Compatibility for Mathworks' and Xilinx tools integration (System Generator, Vivado, Support Package...)

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After having read a comment by Yongfeng here, I'm more confused that I already was about the compatibility between the different Matlab and Xilinx tools and their versions.
I understand that it has to be clearly distinguished between two different ways to set up the integration:
  1. Simulink + System Generator
  2. Simulink + Target support package + Xilinx toolchain
Following Yongfeng's comment, System Generator wouldn't (1) be supported at all in R2014b?? Does this mean support has been removed, and that I need to use a previous Matlab? This seems “strangeâ€. Or does it just mean that it won't work with Vivado 2014.3/.4? Looking here, the information seems contradictory.
Regarding to the second approach (2), according to R2014b release notes, Vivado is supported now (instead of ISE). So should this work with 2014.3/.4? After looking at the Vivado Release notes , I'm even more confused.
As far as I know System Generator (1) works with R2013b/2014a and 2014.2. And the previous setup with Target Support Package (2) (enabling PiL) was for ISE >14.4 and SDK >2013.4, right?
So: the specific question would be (as the previous setups’ compatibilities aren’t really relevant): which are the latest usable versions for both mentioned setups?
A clarification of these points would be probably greatly appreciated by many people, and certainly by me. Unfortunately, I see several open issues related to HDL generation, IP cores and Vivado integration in the forums.
Best regards and thanks in advance.
Martin
  1 Commento
Martin Dendaluce
Martin Dendaluce il 8 Dic 2014
As an additionnal comment, because although unfortunately I can't test it yet, I'm very interested in these workflows: the current alternative approach I will try to evaluate is to directly use Vivado HLS to translate generated C code into (V)HDL/Verilog. I see that this could even be integrated into Simulink by importing the output of Vivado HLS to a System Generator block. Furthermore, I'm also very interested in ways of setting up a PiL simulation with the Zynq and C code Synthesized to the FPGA, but I think that should probably be treated in a separate thread.

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Risposte (2)

Eric Cigan
Eric Cigan il 31 Dic 2014
Please note that in HDL Coder R2014b, both Xilinx ISE and Vivado are supported as downstream tools. I understand that Yongfeng was trying to distinguish between "classic" System Generator and Vivado System Generator, which is the version that isn't supported with subsystems in HDL Coder R2014b.

nagendra
nagendra il 14 Mar 2017
my xilinx ise design suite is 14.5 and matlab version is 2012a, but how to download the licence file please any one help me

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