Simulink models to Verilog HDL coder

i am trying to convert EVD model to verilog code but it doesnt take matrices as input, plz guide.

1 Commento

Is the problem with all matrices, or is it just requiring that the size of the matrix be fixed ?

Accedi per commentare.

Richiesto:

il 16 Gen 2012

Risposto:

il 6 Mar 2023

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