MATLAB Answers

Failed to initialize the RTIOStream library during FPGA-in-the-loop simulation

32 views (last 30 days)
Bo Zhang
Bo Zhang on 9 Mar 2016
Commented: water water on 9 Sep 2020
Hello, I tried to use HDL coder and HDL verifier to connect the matlab with my FPGA. I did the FPGA-in-the-loop simulation as the tutorial PID Controller, but during simulation, it prompted 'Failed to initialize the RTIOStream library'. How can I solve this problem?
I use JTAG to connect my FPGA board. I pass the FPGA Turnkey test and I am able to load my Verilog/VHDL code to the board and successfully run the program. However, it does not work when trying co-simulation with Simulink and FPGA.
Is the problem because that I only use JTAG for connection? Do I need to use Ethernet for connection as well?
Hope anyone can help me. Thanks a lot!


Sign in to comment.

Accepted Answer

Tao Jia
Tao Jia on 10 Mar 2016
When you test the board, you need to check "include FPGA Board in the test" checkbox to do a full test. Otherwise, it will not try to run the simulation.
When you get error message "Failed to initialize the RTIOStream library" in simulation, can you tell if there's error message printed at the MATLAB console at the same time? Sometimes the error message is printed there.
It would be helpful if you can provide more information regarding your FPGA board.


Vaheda on 28 Nov 2016
Hello, I am also getting the same error message "Failed to initialize the RTIOStream library" in simulation. In this case, on the MATLAB console, getting message "Did not find any Digilent® JTAG cable. Make sure that the cable is connected to your computer". But the JTAG is connected to the board through the PC. Then what causes this error to come?? Hope anyone help to solve this. Thanks in advance

Sign in to comment.

More Answers (2)

Werner Bachhuber
Werner Bachhuber on 31 Aug 2017
I recently came across the same error message "Failed to initialize the RTIOStream library" with FPGA-in-the-Loop (JTAG mode) after successfully programming the bitstream via JTAG. In my case it could be solved updating the FTDI driver on the Windows computer. Please make sure that you have a recent version of the driver installed (FTDI version from 09/28/16 or later). Hope that helps.

  1 Comment

Solomon Mamo Banteywalu
Solomon Mamo Banteywalu on 19 Nov 2017
This error may also happen if you try to simulate two instances of controller/simulation models in one simulation.I think, during the loading process one instance replaces the other in the FPGA or simulink can not read both instances using the single cable.

Sign in to comment.

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by