hdl code generation to come across check block compatibility error. How can I fix?

Hello, I'm now using HDL coder to generate VHDL code from my model named simple_timer_model. And then program it to the target device(Xilinx Zedboard). I encontered some errors and warnings in the stage 2.3 check Block Comatibility of HDL workflow adviser. Here is the list of the Warnings:

Error: Unhandled mixed double, single, and non-real datatypes at ports of block.

Error: Cannot find the implementation for block 'hdlcoder_sobel_video/Behavior Model Result'. To continue code generation, and avoid this error, you may choose to 'Comment out' this block.

Error: Matrices are not supported.

Error: Matrices are not supported at Simulink block interfaces.

[aijaz]

PID_controller12/controller/SumErrorMixed double, single, half, and non-real datatypes at ports of block is not allowed.

this is the same issue which i am facing now a days i am just trying to resolve this issue but i am unable to resolve.

Answer 1

[Walter Roberson]

"Error: Unhandled mixed double, single, and non-real datatypes at ports of block."

In at least one block, you have are doing arithmetic between a double() and a single() value, or you are doing arithmetic between a non-complex value and a complex value. If you are doing arithmetic between a single() and a double(), you need to use single() or double() to convert the other signal to the one you want to do the arithmetic in. If you are doing arithmetic between a non-complex value and a complex value, you need to either complex() the non-complex value or you need to real() or imag() or abs() the complex value. This presumes you are using a MATLAB Function block, or a math function block; otherwise you might need to use https://www.mathworks.com/help/simulink/slref/datatypeconversion.html

"Error: Matrices are not supported.

Error: Matrices are not supported at Simulink block interfaces."

See the discussion at https://www.mathworks.com/company/newsletters/articles/converting-matlab-algorithms-into-serialized-designs-for-hdl-code-generation.html

Answer 2

[Bharath Venkataraman]

I assume you are trying to run this example ?

You may be trying to generate HDL code for the entire model. Please generate HDL code for just the top-level subsystem (Pixel Stream HDL Model). To do this, you can either click on the subsystem and type makehdl on the command line or right-click on the subsystem and choose the option to generate HDL code.

[Walter Roberson]

That would appear to be potentially useful information, but it seems a bit implausible to be the situation for a model named "simple_timer_model"