Error while converting a sine PWM block in simulink to HDL code

I have simulated a sine pwm block in simulink. Using HDL code generator I have tried to generate the verilog code for the Altera/Cyclone II target board. The code generation failed at the RTL code generation step. The error message is:

".\emlinterface\EMLInterfaceForHDL.cpp:375:"

"Stopping compilation due to the active MATLAB code errors"

But the block run perfectly in the simulink and I have verified the waveform in the simulink scope.

Any idea what could be wrong?

Roy

[Muthu Annamalai]

Are you able to see a report with "active MATLAB code errors" ? Can you share these here?

[Tim McBrayer]

Roy, what specific block are you using here? (There is no block named "sine pwm" in Simulink.) Can you post how it's configured,, e.g. mask parameters, port data types, etc? You didn't provide much information to work with.

[Roy Francis]

Hello Sir,

I have used counter free running block(10 bit) for the sawtooth waveform generator. Also I have used a discrete sine wave form from DSP tool box source(50 Hz,solver-discrete, sampling time 0.0000001 seconds). Reference sine wave is compared with triangular wave form to generate the sine pwm. For comparison, relational operator is used with boolean output format. I have been able to generate the spwm code for a single switch. When I tried to duplicate the block using copy and paste and tried to generate spwm waveform for the other 3 switches, the error message mentioned in the previous question came. Simulink block for the complete block is working without any errors. Error message came at the stage of RTL code generation stage. Any idea what went wrong?

Regards,

[Tim McBrayer]

Nothing seems out of line with your description. At this point I would recommend opening a case with MathWorks Technical Support. Since the error appears when moving from one to three instances, I would concentrate on that. Revert back to one instance; ensure you can generate code. Add a second, with no additional connecting logic; does that work? Add whatever extra logic you need in your design for interconnecting the two; does that work? If you can provide technical support with two similar models, one that works and one that fails MathWorks will have a easier time fixing the issue. In addition, if you understand where the issue originates from you may be able to choose a slightly different implementation, a different block or block configuration, that works around the problem.

[Pham Van Dung]

I also have a research in PWM in FPGA use HDL coder, may be I have some experiments to help you. Can you send this block into my email: [e-mail] ?

Answer 1

[Kiran Kintali]

Answer 2

[Kiran Kintali]

See the attached example on how to generate square wave pulses at regular intervals. The waveform parameters, Amplitude, Pulse Width, Period, and Phase delay, determine the shape of the output waveform.