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Luca Di Nunzio


University of Rome Tor Vergata

Last seen: 7 mesi fa |  Attivo dal 2021

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Risolto


Remove DC
Input x is the sampled signal vector, may have both AC and DC components. Output y should not contain any DC component. Examp...

oltre un anno fa

Risolto


Times 2 - START HERE
Try out this test problem first. Given the variable x as your input, multiply it by two and put the result in y. Examples:...

oltre un anno fa

Domanda


Soc Builder Support for Xilinx and DDR4 external memory
Hello, I am using Soc Builder Support for Xilinx to develop some projects on the ZCU 111 board with RFSOC. There are some asp...

oltre 2 anni fa | 1 risposta | 0

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Domanda


Problem with zcu111 board and Soc Builder
Hello, I have some problems with the soc builder flow and the zcu111 board. I try to summarize the problems. both "SoC Block...

oltre 2 anni fa | 1 risposta | 0

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