photo

JOAQUIN GARCIA ORDOÑEZ


Last seen: quasi un anno fa |  Attivo dal 2020

Followers: 0   Following: 0

Statistica

  • First Review
  • Thankful Level 1

Visualizza badge

Feeds

Visto da

Domanda


Processor and FPGA Synchronization in Coprocessing Mode
Hello everyone. I'm following this documentation to run an experiment that is hardware-in-the-loop: https://mathworks.com/help/...

oltre 3 anni fa | 1 risposta | 0

1

risposta

Domanda


HDL Coder won't map LUT into BRAM
Hello everyone. I am trying to implement a machine learning algorithm into an FPGA using HDL Coder. I was recommended to use LU...

quasi 4 anni fa | 1 risposta | 0

1

risposta

Domanda


How can I modify mapping options in HDL Workflow Advisor in Simulink?
Hi everyone. I am trying to implement a design on a FPGA using Simulink's HDL Workflow Advisor. The block that I am trying to i...

oltre 4 anni fa | 1 risposta | 0

1

risposta