readMemory

Read data from memory regions on FPGA or SoC hardware

Since R2023a

Syntax

data = readMemory(hFPGA,addr,dataLen)

data = readMemory(hFPGA,InterfaceID,addr,dataLen)

Description

data = readMemory(hFPGA,addr,dataLen) reads dataLen locations of data from the FPGA, hFPGA, starting from the address specified in addr and incrementing the address for each word. The address must be in the range of one of the AXI4 Slave or Memory interfaces added to the hFPGA object. The read operation connects to the corresponding interface based on the address specified.

data = readMemory(hFPGA,InterfaceID,addr,dataLen) reads dataLen locations of data from the FPGA, hFPGA, starting from the address specified in addr and incrementing the address for each word. The address must be in the range of one of the AXI4 Slave or Memory interfaces added to the hFPGA object. The read operation connects to the corresponding interface based on the interface ID specified.

Examples

Read Scalar Data from Memory

Read scalar data from FPGA-accessible memory.

Create an fpga object, hFPGA, for a Xilinx^® target.

hFPGA = fpga("Xilinx")

hFPGA = 

  fpga with properties:

       Vendor: "Xilinx"
   Interfaces: [0x0 fpgaio.interface.InterfaceBase]

    

Add the memory interface to the hFPGA object by using the addMemoryInterface function. Specify the memory interface name, base address, and address range. Save the memory interface object to hInterface.

hInterface = addMemoryInterface(hFPGA, InterfaceID = "myInterface",...
BaseAddress = 0x80000000,AddressRange = 0x20000000)

hInterface = 

  Memory with properties:

     InterfaceID: "myInterface"
     BaseAddress: "0x80000000"
    AddressRange: "0x20000000"
     WriteDriver: [1×1 matlabshared.libiio.sharedmem.write]
      ReadDriver: [1×1 matlabshared.libiio.sharedmem.read]
      InputPorts: [0×0 string]
     OutputPorts: [0×0 string]

Write data to a memory location.

writeMemory(hFPGA,0x80000000,uint32(5));

Read data from a single location.

data = readMemory(hFPGA,0x80000000,1)

data =
 
    uint32
 
        5

Read Vector Data from Memory

Read vector data from FPGA accessible memory.

Create an fpga object, hFPGA, for a Xilinx target.

hFPGA = fpga("Xilinx")

hFPGA = 

  fpga with properties:

       Vendor: "Xilinx"
   Interfaces: [0x0 fpgaio.interface.InterfaceBase]

    

Add the memory interface to the hFPGA object by using the addMemoryInterface function. Specify the memory interface name, base address, and address range. Save the memory interface object to hInterface.

hInterface = addMemoryInterface(hFPGA, InterfaceID = "myInterface",...
BaseAddress = 0x80000000,AddressRange = 0x20000000)

hInterface = 

  Memory with properties:

     InterfaceID: "myInterface"
     BaseAddress: "0x80000000"
    AddressRange: "0x20000000"
     WriteDriver: [1×1 matlabshared.libiio.sharedmem.write]
      ReadDriver: [1×1 matlabshared.libiio.sharedmem.read]
      InputPorts: [0×0 string]
     OutputPorts: [0×0 string]

Write data to a memory location.

writeMemory(hFPGA,0x80000000,uint32(1:5));

Read data from a single location.

data = readMemory(hFPGA,0x80000000,5)

data =
 
    uint32
 
        1 2 3 4 5

Read from Overlapping Memory Locations

This example shows you how to use the optional InterfaceID argument to read data from a section of memory shared between multiple interfaces.

Create an fpga object, hFPGA, for a Xilinx target.

hFPGA = fpga("Xilinx")

hFPGA = 

  fpga with properties:

       Vendor: "Xilinx"
   Interfaces: [0x0 fpgaio.interface.InterfaceBase]

    

Add the AXI4 slave interface to the hFPGA object by using the addAXI4SlaveInterface function.

%% AXI4 Slave
addAXI4SlaveInterface(hFPGA, ...
	"InterfaceID", "EthernetAccess", ...
	"BaseAddress", 0x40D0000, ...
	"AddressRange", 0x10000);

Use the aximanager object to add a JTAG AXI Interface manager. Add the AXI4 slave interface to the hFPGA object by using the addAXI4SlaveInterface function.

axim = aximanager("Xilinx");
%% AXI4 Slave
addAXI4SlaveInterface(hFPGA, ...
	"InterfaceID", "JTAGAccess", ...
	"BaseAddress", 0x40D0000, ...
	"AddressRange", 0x10000,...
       "WriteDriver", axim,...
      "ReadDriver", axim,...
      "DriveAddressMode", "Full");

Read data from an overlapping memory location by using the preferred interface ID.

data = readMemory(hFPGA, "EthernetAccess",...
0x400D0100, 1);

Input Arguments

hFPGA — Target FPGA object

fpga object

Target FPGA object, specified as an fpga object.

addr — Starting address for read operation

nonnegative integer | nonnegative hexadecimal value

Starting address for the read operation, specified as a nonnegative integer that is a multiple of 4 or hexadecimal value that is a multiple of 4. The function casts the address to the uint32 or uint64 data type, depending on the memory interface address width. The address must be in the range of one of the AXI4 Slave or Memory interfaces added to the hFPGA object.

Example: 0x80000000 specifies a starting address of 0x80000000.

Data Types: uint32 | uint64

dataLen — Length of data to read

nonnegative integer

Length of data to read, starting at addr, specified as a nonnegative integer. By default, the function reads data from a contiguous address block, and increments the address for each operation.

When you specify a large operation size, such as when you read a block of DDR memory, the function automatically breaks the operation into multiple bursts, using the maximum supported burst size of 256 words.

Example: 5 specifies five contiguous memory locations.

InterfaceID — Name of FPGA interface

"" | string

Name of FPGA interface, specified as a string.

Output Arguments

data — Read data

scalar | vector

Read data, returned as a scalar or vector depending on the value you specify for dataLen.

Version History

Introduced in R2023a