Supported CMSIS Library Functions for ARM Cortex-A Processors

The Embedded Coder^® Support Package for ARM^® Cortex^®-A Processors provides a Code Replacement Library (CRL) ARM Cortex-A CMSIS to generate calls to CMSIS-DSP library optimized for ARM Cortex-A processors.

For more information on CMSIS-DSP library, see https://github.com/ARM-software/CMSIS-DSP.

Operation	CMSIS Function	Supported Data Types	Input Specifications	Replaced MATLAB^® Function, Operator or Simulink^® Block
Elementwise real addition	`arm_add_f64` `arm_add_f32` `arm_add_f16` `arm_add_q31` `arm_add_q15` `arm_add_q7`	`single` `double` `half` `fixdt(true,32,)` `fixdt(true,16,)` `fixdt(true,8,*)`	vector matrix Note To get the code replacement for elementwise real addition, both inputs must be of the same datatype.	`plus`
Elementwise real subtraction	`arm_sub_f64` `arm_sub_f32` `arm_sub_f16` `arm_sub_q31` `arm_sub_q15` `arm_sub_q7`	`single` `double` `half` `fixdt(true,32,)` `fixdt(true,16,)` `fixdt(true,8,*)`	vector matrix Note To get the code replacement for elementwise real subtraction, both inputs must be of the same datatype.	`minus`
Elementwise real multiplication	`arm_mult_f64` `arm_mult_f32` `arm_mult_f16` `arm_mult_q31` `arm_mult_q15` `arm_mult_q7`	`single` `double` `half` `fixdt(true,32,)` `fixdt(true,16,)` `fixdt(true,8,*)`	vector matrix Note To get the code replacement for elementwise real multiplication: Ensure that inputs with floating-point data types, such as double, single, or half, are of the same type. For fixed point inputs, both the inputs must be of equal word length. When using the `fixdt(true,32,)` data type , the fraction length of the output must be equal to 31 less than the sum of fraction length of the two inputs. When using the `fixdt(true,16,)`data type , the fraction length of the output must be equal to 15 less than the sum of fraction length of the two inputs. When using the `fixdt(true,8,*)` data type , the fraction length of the output must be equal to 7 less than the sum of fraction length of the two inputs.	`times`
Real absolute	`arm_abs_f64` `arm_abs_f32` `arm_abs_f16` `arm_abs_q31` `arm_abs_q15` `arm_abs_q7`	`single` `double` `half` `fixdt(true,32,31)` `fixdt(true,16,15)` `fixdt(true,8,7)`	vector matrix	`abs`
Real dot product	`arm_dot_prod_f64` `arm_dot_prod_f32`	`single` `double`	vector	`dot`
Vector log real	`arm_vlog_f64` `arm_vlog_f32`	`single` `double`	scalar vector matrix	`log`
Vector exponential real	`arm_vexp_f64` `arm_vexp_f32` `arm_vexp_f16`	`single` `double` `half`	scalar vector matrix	`exp`

Note

ARM Cortex-A CMSIS CRL supports both 32 bit and 64 bit ARM Cortex-A architectures.
Only 64 bit ARM Cortex-A architectures support the half data type.
If you encounter situations where the ARM Cortex-A CMSIS CRL does not provide code replacements due to the input vector length being below the threshold, you can enable CMSIS function generation for all input lengths. To do this, set the environment variable DISABLE_ARMCORTEXA_CMSIS_CRL_THRESHOLDS to true using the following command:
```
setenv('DISABLE_ARMCORTEXA_CMSIS_CRL_THRESHOLDS',true)
```