SerDes Design and Verification for PAM3 and PAM4 High-Speed Digital Links
The requirements of emerging wireline communication systems for higher data rates is driving the need for SerDes systems to operate with higher order modulation schemes such as PAM3 and PAM4.
SerDes systems architectures and adaption algorithms need to change for achieving this mandatory performance. Accurate system-level models of the physical layer including impairments such as jitter, crosstalk, and non-linearity are required in the study and development of innovative architectures.
In this presentation, you will learn how to model PAM3 and PAM4 SerDes systems using measurement data and data sheet specifications, and integrate smarter adaptation and optimization algorithms.
- SerDes analysis for PAM3 and PAM4 modulation
- Bottom up modeling of analog impairments such as crosstalk, jitter, non-linearity
- System-level simulation including global optimization algorithms
- IBIS-AMI model generation for channel verification
About the Presenter
Giorgia Zucchelli is the product marketing manager for RF and mixed-signal at MathWorks. Before moving to this role in 2013, she was an application engineer focusing on signal processing and communications systems and specializing in analog simulation. Before joining MathWorks in 2009, Giorgia worked at NXP Semiconductors on mixed-signal verification methodologies and at Philips Research developing system-level models for innovative telecommunication systems. Giorgia has a master’s degree in electrical engineering and a doctorate in electronics for telecommunications from the University of Bologna. Her thesis dealt with modeling high-frequency RF devices.
Recorded: 17 Dec 2020
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